- SubjectSemiconductor circuit layout
- RequirementOriginality
- AuthorityTÜRKPATENT
Prepared by: Teescil Intellectual Property Consultancy TeamLast updated:
An integrated circuit topography refers to the three-dimensional layout of the elements of a semiconductor product and their interconnections. These layouts are developed with major R&D investments, yet they can be copied easily. Topography registration provides special protection that prevents your circuit layout from being produced without permission and used commercially.
Conditions of protection
- That the topography is original, that is, the product of the creator's own intellectual effort,
- The absence of an ordinary and commonly known layout in the semiconductor sector.
Teescil support
Our services include preparing the topography representations, definitions and documents required for the application, submitting the application to the Office and following the examination process. For the Office's processing fees and general information our Knowledge Base .
Scope of Service
Originality assessment
We assess the protectability of the topography through a preliminary review.
Representation preparation
Preparing the topography representations required in the application.
Process tracking
The Office’s examination and correspondence are followed on your behalf.
How Does the Process Work?
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1
Evaluation
The originality and commercial use of the topography are examined.
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2
File preparation
Representations and application documents are prepared.
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3
Application
The application is filed and the process is monitored.
Information and Documents Required for the Application
- Topography representations
- Creator and applicant information
- Power of attorney